This invention relates to memory cell circuits, and more particularly, to an electrically alterable memory cell circuit using a capacitor as a non-volatile storage element for the information stored in the memory cell during power down conditions.
The prior art shows many bistable multivibrator circuit designs using many different types of active elements. This prior art shows MOS bistable multivibrator circuits designed to include a capacitive imbalance in each half of the bistable multivibrator circuit wherein the capacitive imbalance takes the form of a larger transistor junction in one side of the bistable multivibrator as compared to the size of the junction in the other side of the bistable multivibrator. In this prior art circuit, when the bistable multivibrator is activated, both sides of the bistable multivibrator start conducting and a race begins to determine which capacitive means charges the fastest. The side having the smaller capacitance charges more quickly toward the charging voltage level. The voltage being established on the capacitor is cross-coupled to the gate electrode of the transistor in the other side of the bistable multivibrator. When the charging voltage exceeds the turn-on threshold of the transistor, the transistor turns on and ends the race between the two capacitors. The bistable multivibrator is now in one of its two stable states having the side with the larger value of capacitance turned on and the other side turned off.
Since the capacitive elements used in this prior art circuit are the transistor junctions, they are non-alterable. This is to be compared with the present invention which uses variable capacitors in the bistable multivibrator circuit for creating the capacitive imbalance to the bistable multivibrator circuit.
The prior art memory cells using MOS devices do not provide a non-volatile storage function which is performed on the chip itself. In one embodiment of the present invention, the non-volatile storage function is performed by the same capacitive element which also provides the capacitive imbalance to the MOS bistable multivibrator memory cell.
A further embodiment of the present invention employs standard MOS capacitors for providing the capacitive imbalance to the MOS bistable multivibrator circuit in combination with an additional MNOS variable capacitor attached in parallel with one of the standard capacitors for providing the non-volatile storage function to the memory cell.